The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2015
Filed:
Mar. 14, 2013
Applicant:
Pulsic Limited, Bristol, GB;
Inventors:
Robert Eisenstadt, Los Altos, CA (US);
Mark Waller, Bristol, GB;
Tim Parker, Bristol, GB;
Mark Williams, Glos, GB;
Jeremy Birch, Bristol, GB;
Graham Balsdon, Glos, GB;
Fumiako Sato, Tokyo, JP;
Assignee:
Pulsic Limited, , GB;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5031 (2013.01);
Abstract
A technique generates small scale clock trees using a spine-based architecture (using spine routing) while also using clustered placement. Techniques are used to control clock sink cluster contents in order to minimize clock skew, minimize clock buffer count, and minimize use of routing resources. This approach also provides the user with ample structure and control to customize small efficient clock trees, and can also reduce clock power consumption.