The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2012
Filed:
Mar. 20, 2009
Graham Balsdon, Glos, GB;
Jeremy Birch, Bristol, GB;
Mark Williams, Glos, GB;
Mark Waller, Bristol, GB;
Tim Parker, Bristol, GB;
Fumiaki Sato, Tokyo, JP;
Graham Balsdon, Glos, GB;
Jeremy Birch, Bristol, GB;
Mark Williams, Glos, GB;
Mark Waller, Bristol, GB;
Tim Parker, Bristol, GB;
Fumiaki Sato, Tokyo, JP;
Pulsic Limited, , GB;
Abstract
A technique will automatically route interconnect of an integrated circuit while taking into consideration current density rules. In an implementation, the technique uses a shape-based approach where a grid is not used. Based on data input including current density and a frequency of each net, the technique will determine the current requirements for each net. In an implementation, the technique forms a Steiner tree for a net, and routs using the Steiner tree. The technique widens nets having greater current requirements; adjacent wiring may be pushed aside to create sufficient space for wider nets.