The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2008
Filed:
May. 16, 2006
Applicants:
Graham Balsdon, Glos, GB;
Jeremy Birch, Bristol, GB;
Mark Williams, Glos, GB;
Mark Waller, Bristol, GB;
Tim Parker, Bristol, GB;
Fumiaki Sato, Tokyo, JP;
Inventors:
Graham Balsdon, Glos, GB;
Jeremy Birch, Bristol, GB;
Mark Williams, Glos, GB;
Mark Waller, Bristol, GB;
Tim Parker, Bristol, GB;
Fumiaki Sato, Tokyo, JP;
Assignee:
Pulsic Limited, , GB;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A technique will automatically route interconnect of an integrated circuit. In an implementation, the technique operates on a gridless layout. The technique forms a Steiner tree for a net and routs using the Steiner tree. In a specific embodiment, the technique creates tracks having varying widths.