For the Inventor, By the Inventor

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San Jose, CA, United States of America

Netspeed Systems

USPTO Granted Patents = 74

Forward Citations = 1,064

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19 inventors (with patents filed for the assignee):

Sailesh Kumar (72 out of 90 patents)

Eric Norige (33 out of 38 patents)

Joji Philip (22 out of 26 patents)

4. Joseph Rowlands (12 out of 13 patents)

5. Pier Giorgio Raponi (11 out of 14 patents)

6. Sundari Mitra (11 out of 12 patents)

7. Mahmud Hassan (11 out of 11 patents)

8. Joe Rowlands (9 out of 10 patents)

9. Nishant Rao (8 out of 13 patents)

10. Anup Gangwar (5 out of 17 patents)

11. Vishnu Mohan Pusuluri (5 out of 6 patents)

12. Poonacha Kongetira (4 out of 5 patents)

13. Rajesh Chopra (3 out of 10 patents)

14. James Bauman (3 out of 9 patents)

15. Rimu Kaushal (3 out of 3 patents)

Core Competencies:

System On Chip

Network On Chip

Field Programmable Gate Array

Heterogeneous SoC

Machine Learning

Quality Of Service

Power Management

Congestion Control

Interface Virtualization

Automatic Buffer Sizing

Topology Generation

Streaming Bridge Design

74 patents: Sort by Forward Citations

1. 11176302 - System on chip (SoC) builder (2021-11-16),

2. 11144457 - Enhanced page locality in network-on-chip (NoC) architectures (2021-10-12),

3. 11023377 - Application mapping on hardened network-on-chip (NoC) of field-programmable gate array (FPGA) (2021-06-01),

4. 10983910 - Bandwidth weighting mechanism based network-on-chip (NoC) configuration (2021-04-20),

5. 10896476 - Repository of integration description of hardware intellectual property for NoC construction and SoC integration (2021-01-19),

6. 10749811 - Interface virtualization and fast path for Network on Chip (2020-08-18),

7. 10735335 - Interface virtualization and fast path for network on chip (2020-08-04),

8. 10613616 - Systems and methods for facilitating low power on a network-on-chip (2020-04-07),

9. 10564704 - Systems and methods for facilitating low power on a network-on-chip (2020-02-18),

10. 10564703 - Systems and methods for facilitating low power on a network-on-chip (2020-02-18),

11. 10554496 - Heterogeneous SoC IP core placement in an interconnect to optimize latency and interconnect performance (2020-02-04),

12. 10547514 - Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation (2020-01-28),

13. 10528682 - Automatic performance characterization of a network-on-chip (NOC) interconnect (2020-01-07),

14. 10523599 - Buffer sizing of a NoC through machine learning (2019-12-31),

15. 10218581 - Generation of network-on-chip layout based on user specified topological constraints (2019-02-26),

NetSpeed Systems is a leading provider of highly scalable and customizable network on chip (NoC) IP for SoC designers. Their NoC IP offers complete solutions for on-chip connectivity and makes complex SoC designs easier to implement. NetSpeed Systems' technology enables faster time-to-market and improved design productivity, helping customers meet the increasing demands of today's advanced electronic systems.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Dec 23 2025

74 Patents

#135 in San Jose, CA

#1,143 in California

#4,753 in US

#9,715 in the World

San Jose, CA, United States of America

Netspeed Systems

Forward Citations = 1,064

19 inventors:

Sailesh Kumar (72 out of 90 patents)

Eric Norige (33 out of 38 patents)

Joji Philip (22 out of 26 patents)

4. Joseph Rowlands (12 out of 13 patents)

5. Pier Giorgio Raponi (11 out of 14 patents)

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