The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2020
Filed:
Feb. 23, 2018
Applicant:
Netspeed Systems, Inc., San Jose, CA (US);
Inventors:
James A. Bauman, Los Gatos, CA (US);
Joe Rowlands, San Jose, CA (US);
Sailesh Kumar, San Jose, CA (US);
Assignee:
NetSpeed Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 15/78 (2006.01); G06F 1/3287 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 15/7825 (2013.01); Y02D 10/171 (2018.01);
Abstract
Aspects of the present disclosure are directed to a power specification and Network on Chip (NoC) having a power supervisor (PS) unit. The specification is utilized to generate a NoC with power domains and clock domains. The PS is configured with one or more power domain finite state machines (PDFSMs) that drive signaling for the power domains of the NoC, and is configured to power the NoC elements of the power domain on or off. NoC elements are configured to conduct fencing or draining operations to facilitate the power state transitions.