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For the Inventor, By the Inventor

San Jose, CA, United States of America

Nishant Rao

USPTO Granted Patents = 13 

Average Co-Inventor Count = 3.3

ph-index = 2

Forward Citations = 31(Granted Patents)


Company Filing History:

goldMedal8 out of 74 
 
Netspeed Systems
 patents
silverMedal5 out of 832,680 
Other
 patents

Years Active: 2018-2021

where 'Filed Patents' based on already Granted Patents

13 patents (USPTO):
1. 11176302 - System on chip (SoC) builder (2021-11-16),
2. 10896476 - Repository of integration description of hardware intellectual property for NoC construction and SoC integration (2021-01-19),
3. 10749811 - Interface virtualization and fast path for Network on Chip (2020-08-18),
4. 10735335 - Interface virtualization and fast path for network on chip (2020-08-04),
5. 10547514 - Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation (2020-01-28),
6. 10523599 - Buffer sizing of a NoC through machine learning (2019-12-31),
7. 10469338 - Cost management against requirements for the generation of a NoC (2019-11-05),
8. 10469337 - Cost management against requirements for the generation of a NoC (2019-11-05),
9. 10419300 - Cost management against requirements for the generation of a NoC (2019-09-17),
10. 10348563 - System-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology (2019-07-09),
11. 10298485 - Systems and methods for NoC construction (2019-05-21),
12. 10084725 - Extracting features from a NoC for machine learning construction (2018-09-25),
13. 10063496 - Buffer sizing of a NoC through machine learning (2018-08-28),

Title: Innovations of Nishant Rao in System-on-Chip Design

Introduction

Nishant Rao is a prominent inventor based in San Jose, California, known for his significant contributions to the field of System-on-Chip (SoC) design. With a total of 13 patents to his name, Rao has developed innovative methods and systems that enhance the design and verification processes of SoCs. His work is characterized by a focus on integrating functional building blocks while considering various design aspects.

Latest Patents

One of Nishant Rao's latest patents is a System on Chip (SoC) builder. This invention outlines methods and example implementations for constructing SoCs from functional building block circuits. The design process takes into account numerous chip-level design aspects and includes the generation of a simulation environment for design verification. The method involves generating connections between integration descriptions of a floor plan based on traffic specifications and conducting a design check process. If the design check is successful, the SoC is generated according to the established connections.

Another notable patent is related to a repository of integration descriptions of hardware intellectual property (IP) for Network-on-Chip (NoC) construction and SoC integration. This invention provides a method for managing a repository of hardware IP, which includes storing integration descriptions and selecting them for incorporation into NoC/SoC designs. The method facilitates the generation of NoC/SoC from the parsed selections of hardware IP.

Career Highlights

Throughout his career, Nishant Rao has worked with several companies, including Netspeed Systems. His experience in the industry has allowed him to refine his skills and contribute to cutting-edge technologies in SoC design.

Collaborations

Nishant has collaborated with notable professionals in the field, including Sailesh Kumar and Pier Giorgio Raponi. These collaborations have further enriched his work and expanded the impact of his innovations.

Conclusion

Nishant Rao's contributions to the field of System-on-Chip design through his patents and collaborations highlight his role as a leading inventor in the technology sector. His innovative methods continue to influence the development of advanced SoC solutions.

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