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For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Ampere Computing LLC


USPTO Granted Patents = 82


Trademarks = 11

Forward Citations = 106

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107 inventors (with patents filed for the assignee):

goldMedal Alfred Yeung (9 out of 15 patents)

silverMedal Benjamin C Chaffin (9 out of 23 patents)

bronzeMedal Nagi Aboulenein (9 out of 23 patents)

4.  Sandeep Brahmadathan (9 out of 9 patents)

5.  Bret Leslie Toll (8 out of 8 patents)

6.  Matthew Robert Erler (8 out of 9 patents)

7.  Harb Abdulhamid (8 out of 11 patents)

8.  Jonathan Christopher Perry (7 out of 10 patents)

9.  Stephan Jourdan (7 out of 94 patents)

10.  Richard James Shannon (7 out of 7 patents)

11.  Keyur Chudgar (6 out of 19 patents)

12.  Massimo Sutera (6 out of 14 patents)

13.  Jared Eric Bendt (6 out of 6 patents)

14.  Robert J Safranek (5 out of 55 patents)

15.  Kjeld Svendsen (5 out of 14 patents)


Core Competencies:
Cache Coherency
Memory Resource Control
Boot Security
Error Correction Code
Multi-Level Caching
Instruction Scheduling
Processor-Based Systems
Memory Utilization
On-Die Voltage Detection
System-on-Chip
Data Management
Network Nodes

82 patents:

1. 12748705 - Multi-core processor-based system implementing directed page table entry invalidation (2026-09-29),
2. 12717583 - Processor macro-operation fusion (2026-08-25),
3. 12699568 - Runtime adaptive prefetching in a many-core system (2026-08-04),
4. 12681865 - Processors with toggleable memory tagging extensions and related methods (2026-07-14),
5. 12664094 - Memory coherence with early store completion (2026-06-23),
6. 12645800 - Method and system for patching a boot process (2026-06-02),
7. 12645628 - Method and system for data transactions on a communications interface (2026-06-02),
8. 12639069 - Providing additional operations for a functional unit of a processor core (2026-05-26),
9. 12613803 - Cache memory system employing a multiple-level hierarchy cache coherency architecture (2026-04-28),
10. 12554640 - Apparatuses, systems, and methods for controlling cache allocations in a configurable combined private and shared cache in a processor-based system (2026-02-17),
11. 12549479 - Apparatus and method of routing a request in a mesh network (2026-02-10),
12. 12493552 - Performing snoop filter replacement based on history-augmented victimization priority values of snoop filter entries in processor-based devices (2025-12-09),
13. 12474848 - Techniques for memory resource control using memory resource partitioning and monitoring (2025-11-18),
14. 12451206 - Extending functionality of memory controllers using a loopback mode for testing in a processor-based device (2025-10-21),
15. 12423108 - Devices transferring cache lines, including metadata on external links (2025-09-23),
Ampere Computing LLC, based in Santa Clara, CA, specializes in advanced cache memory systems, focusing on enhancing performance and efficiency in processor-based systems. The company is at the forefront of developing technologies related to cache coherency, memory resource control, and multi-level caching, which are critical for optimizing memory utilization in modern computing environments. Additionally, Ampere emphasizes boot security and error correction code to ensure reliable and secure operations in its innovative solutions.
Profile summary based on public USPTO records.

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USPTO Data Jan 1 1976 - Sep 29 2026

Ampere Computing LLC
82 Patents

#45 in Santa Clara, CA

#1,046 in California

#4,522 in US

#9,246 in the World

Santa Clara, CA (US)
Santa Clara, CA, United States of America

Ampere Computing LLC

Forward Citations = 106

107 inventors:

goldMedal Alfred Yeung (9 out of 15 patents)

silverMedal Benjamin C Chaffin (9 out of 23 patents)

bronzeMedal Nagi Aboulenein (9 out of 23 patents)

4.  Sandeep Brahmadathan (9 out of 9 patents)

5.  Bret Leslie Toll (8 out of 8 patents)

Please report any incorrect information to [email protected]
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