The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2026
Filed:
Sep. 21, 2023
Ampere Computing Llc, Santa Clara, CA (US);
Bret Leslie Toll, Hillsboro, OR (US);
Benjamin Crawford Chaffin, Portland, OR (US);
Jonathan Christopher Perry, Portland, OR (US);
David Paul Turley, Portland, OR (US);
Ampere Computing LLC, Santa Clara, CA (US);
Abstract
In processors that include a memory tagging extension (MTE), before reading data from or writing data into a memory address, tag bits associated with the memory address are read from the memory and compared to tag bits in the instruction target address. This delays memory write instructions that would not otherwise have to perform a read from the memory circuit before executing the write operation (e.g., full cache line writes), reducing processor performance. An exemplary processing circuit includes a toggleable MTE to provide access to a memory circuit in one of a first mode, in which a memory tagging extension is enabled, and a second mode, in which the MTE is disabled. The processing circuit includes an execution circuit to process a memory instruction and a load/store circuit that does not read the tag bits when MTE is disabled, thereby reducing execution time of the memory instruction.