The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2017

Filed:

Oct. 15, 2015
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Ching-Yu Chang, Taipei, TW;

Li-Wei Feng, Kaohsiung, TW;

Shih-Hung Tsai, Tainan, TW;

Ssu-I Fu, Kaohsiung, TW;

Jyh-Shyang Jenq, Pingtung County, TW;

Chien-Ting Lin, Hsinchu, TW;

Yi-Ren Chen, Kaohsiung, TW;

Shou-Wei Hsieh, Hsin-Chu, TW;

Hsin-Yu Chen, Nantou County, TW;

Chun-Hao Lin, Kaohsiung, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/324 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823814 (2013.01); H01L 21/324 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01);
Abstract

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon and a shallow trench isolation (STI) around the fin-shaped structure, in which the fin-shaped structure has a top portion and a bottom portion; forming a first doped layer on the STI and the top portion; and performing a first anneal process.


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