The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2016
Filed:
Sep. 14, 2012
Geraldine Tsui Yee Lin, Tung Tau Est, HK;
Walter DE Munnik, Arnhem, NL;
Kin Pui Kwan, Lai King, HK;
Wing Him Lau, Yuen Long, HK;
Kwok Cheung Tsang, Fanling, HK;
Chun Ho Fan, Sam Tseng, HK;
Neil Mclellan, Danville, CA (US);
Geraldine Tsui Yee Lin, Tung Tau Est, HK;
Walter de Munnik, Arnhem, NL;
Kin Pui Kwan, Lai King, HK;
Wing Him Lau, Yuen Long, HK;
Kwok Cheung Tsang, Fanling, HK;
Chun Ho Fan, Sam Tseng, HK;
Neil McLellan, Danville, CA (US);
UTAC HEADQUARTERS PTE. LTD., Singapore, SG;
Abstract
A process for fabricating an integrated circuit package includes selectively etching a leadframe strip to define a die attach pad and a plurality of contact pads. At least one side of the die attach pad has a plurality of spaced apart pad portions. A semiconductor die is mounted to the die attach pad and wires are bonded from the semiconductor die to respective ones of the contact pads. A first surface of the leadframe strip, including the semiconductor die and wire bonds, is encapsulated in a molding material such that at least one surface of the leadframe strip is exposed. The integrated circuit package is singulated from a remainder of the leadframe strip.