The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2016

Filed:

Jul. 23, 2014
Applicant:

Xintec Inc., Jhongli, Taoyuan County, TW;

Inventors:

Yen-Shih Ho, Kaohsiung, TW;

Tsang-Yu Liu, Zhubei, TW;

Shu-Ming Chang, New Taipei, TW;

Yu-Lung Huang, Daxi Township, TW;

Chao-Yen Lin, New Taipei, TW;

Wei-Luen Suen, New Taipei, TW;

Chien-Hui Chen, Zhongli, TW;

Chi-Chang Liao, Pingtung, TW;

Assignee:

XINTEC INC., Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 29/06 (2006.01); H01L 23/525 (2006.01); H01L 23/532 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 21/561 (2013.01); H01L 21/76838 (2013.01); H01L 21/78 (2013.01); H01L 23/3121 (2013.01); H01L 29/0657 (2013.01); H01L 23/3192 (2013.01); H01L 23/525 (2013.01); H01L 23/5329 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0657 (2013.01); H01L 2224/024 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/0569 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05558 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/05611 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05669 (2013.01); H01L 2224/05687 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/4869 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48611 (2013.01); H01L 2224/48624 (2013.01); H01L 2224/48644 (2013.01); H01L 2224/48647 (2013.01); H01L 2224/48655 (2013.01); H01L 2224/48669 (2013.01); H01L 2224/48687 (2013.01); H01L 2224/73203 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/94 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/10155 (2013.01); H01L 2924/10523 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/14 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/3701 (2013.01);
Abstract

A chip package including a chip having an upper surface, a lower surface and a sidewall is provided. The chip includes a signal pad region adjacent to the upper surface. A first recess extends from the upper surface toward the lower surface along the sidewall. At least one second recess extends from a first bottom of the first recess toward the lower surface. The first and second recesses further laterally extend along a side of the upper surface, and a length of the first recess extending along the side is greater than that of the second recess extending along the side. A redistribution layer is electrically connected to the signal pad region and extends into the second recess. A method for forming the chip package is also provided.


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