The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2012

Filed:

Dec. 09, 2004
Applicants:

Geraldine Tsui Yee Lin, Hong Kong, HK;

Walter DE Munnik, Arnhem, NL;

Kin Pui Kwan, Lai King, HK;

Wing Him Lau, Yuen Long, HK;

Kwok Cheung Tsang, Fanling, HK;

Chun Ho Fan, Sam Tseng, HK;

Neil Mclellan, Danville, CA (US);

Inventors:

Geraldine Tsui Yee Lin, Hong Kong, HK;

Walter de Munnik, Arnhem, NL;

Kin Pui Kwan, Lai King, HK;

Wing Him Lau, Yuen Long, HK;

Kwok Cheung Tsang, Fanling, HK;

Chun Ho Fan, Sam Tseng, HK;

Neil McLellan, Danville, CA (US);

Assignee:

UTAC Hong Kong Limited, Tsuen Wan, New Territories, HK;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/04 (2006.01); H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit package having a selectively etched leadframe strip defining a die attach pad and a plurality of contact pads, at least one side of the die attach pad having a plurality of spaced apart pad portions; a semiconductor die mounted to the die attach pad and wires bonding the semiconductor die to respective ones of the contact pads; a first surface of the leadframe strip, including the semiconductor die and wire bonds, encapsulated in a molding material such that at least one surface of the leadframe strip is exposed, and wherein solder paste is disposed on said contact pads and said at least one side of said die attach pad.


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