The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2012

Filed:

Jun. 29, 2009
Applicants:

Jack Kavalieros, Portland, OR (US);

Annalisa Cappellani, Portland, OR (US);

Justin K. Brask, Portland, OR (US);

Mark L. Doczy, Beaverton, OR (US);

Matthew V. Metz, Hillsboro, OR (US);

Suman Datta, Beaverton, OR (US);

Chris E. Barns, Portland, OR (US);

Robert S. Chau, Beaverton, OR (US);

Inventors:

Jack Kavalieros, Portland, OR (US);

Annalisa Cappellani, Portland, OR (US);

Justin K. Brask, Portland, OR (US);

Mark L. Doczy, Beaverton, OR (US);

Matthew V. Metz, Hillsboro, OR (US);

Suman Datta, Beaverton, OR (US);

Chris E. Barns, Portland, OR (US);

Robert S. Chau, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A complementary metal oxide semiconductor integrated circuit may be formed with a PMOS device formed using a replacement metal gate and a raised source drain. The raised source drain may be formed of epitaxially deposited silicon germanium material that is doped p-type. The replacement metal gate process results in a metal gate electrode and may involve the removal of a nitride etch stop layer.


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