The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2008
Filed:
Mar. 27, 2006
Mark L. Doczy, Beaverton, OR (US);
Gilbert Dewey, Hillsboro, OR (US);
Suman Datta, Beaverton, OR (US);
Sangwoo Pae, Beaverton, OR (US);
Justin K. Brask, Portland, OR (US);
Jack Kavalieros, Portland, OR (US);
Matthew V. Metz, Hillsboro, OR (US);
Adrian B. Sherrill, Portland, OR (US);
Markus Kuhn, Portland, OR (US);
Robert S. Chau, Beaverton, OR (US);
Mark L. Doczy, Beaverton, OR (US);
Gilbert Dewey, Hillsboro, OR (US);
Suman Datta, Beaverton, OR (US);
Sangwoo Pae, Beaverton, OR (US);
Justin K. Brask, Portland, OR (US);
Jack Kavalieros, Portland, OR (US);
Matthew V. Metz, Hillsboro, OR (US);
Adrian B. Sherrill, Portland, OR (US);
Markus Kuhn, Portland, OR (US);
Robert S. Chau, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperature for a sufficient time to generate a gate dielectric with a graded dielectric constant.