The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2008

Filed:

Sep. 19, 2003
Applicants:

Darrell Rinerson, Cupertino, CA (US);

Wayne Kinney, Emmett, ID (US);

John E. Sanchez, Jr., Palo Alto, CA (US);

Steven W. Longcor, Mountain View, CA (US);

Steve Kuo-ren Hsia, San Jose, CA (US);

Edmond Ward, Monte Sereno, CA (US);

Christophe Chevallier, Palo Alto, CA (US);

Inventors:

Darrell Rinerson, Cupertino, CA (US);

Wayne Kinney, Emmett, ID (US);

John E. Sanchez, Jr., Palo Alto, CA (US);

Steven W. Longcor, Mountain View, CA (US);

Steve Kuo-Ren Hsia, San Jose, CA (US);

Edmond Ward, Monte Sereno, CA (US);

Christophe Chevallier, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multi-resistive state element that uses a treated interface is provided. A memory plug includes at least two electrodes that sandwich a multi-resistive state element. Using different treatments on both electrode/multi-resistive state element interfaces improves the memory properties of the entire memory device.


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