The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2007

Filed:

Sep. 29, 2004
Applicants:

Daewoong Suh, Phoenix, AZ (US);

Saikumar Jayaraman, Chandler, AZ (US);

Stephen E. Lehman, Chandler, AZ (US);

Mitesh Patel, Phoenix, AZ (US);

Tiffany A. Byrne, Chandler, AZ (US);

Edward L. Martin, Chandler, AZ (US);

Mohd Erwan B. Basiron, Pulau Pinang, MY;

Wei Keat Loh, Penang, MY;

Sheau Hooi Lim, Pulau Penang, MY;

Yoong Tatt P. Chin, Penang, MY;

Inventors:

Daewoong Suh, Phoenix, AZ (US);

Saikumar Jayaraman, Chandler, AZ (US);

Stephen E. Lehman, Chandler, AZ (US);

Mitesh Patel, Phoenix, AZ (US);

Tiffany A. Byrne, Chandler, AZ (US);

Edward L. Martin, Chandler, AZ (US);

Mohd Erwan B. Basiron, Pulau Pinang, MY;

Wei Keat Loh, Penang, MY;

Sheau Hooi Lim, Pulau Penang, MY;

Yoong Tatt P. Chin, Penang, MY;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.


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