The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2006
Filed:
Feb. 05, 2003
Hidehiko Shiraiwa, San Jose, CA (US);
Tazrien Kamal, San Jose, CA (US);
Mark Ramsbey, Sunnyvale, CA (US);
Inkuk Kang, Saratoga, CA (US);
Jaeyong Park, Sunnyvale, CA (US);
Rinji Sugino, San Jose, CA (US);
Jean Y. Yang, Sunnyvale, CA (US);
Fred T K Cheung, San Jose, CA (US);
Arvind Halliyal, Cupertino, CA (US);
Amir H. Jafarpour, Pleasanton, CA (US);
Hidehiko Shiraiwa, San Jose, CA (US);
Tazrien Kamal, San Jose, CA (US);
Mark Ramsbey, Sunnyvale, CA (US);
Inkuk Kang, Saratoga, CA (US);
Jaeyong Park, Sunnyvale, CA (US);
Rinji Sugino, San Jose, CA (US);
Jean Y. Yang, Sunnyvale, CA (US);
Fred T K Cheung, San Jose, CA (US);
Arvind Halliyal, Cupertino, CA (US);
Amir H. Jafarpour, Pleasanton, CA (US);
FASL, LLC, Sunnvale, CA (US);
Abstract
Process for reducing charge leakage in a SONOS flash memory device, including in one embodiment, forming a bottom oxide layer of an ONO structure on the semiconductor substrate to form an oxide/silicon interface having a first oxygen content adjacent the oxide/silicon interface; treating the bottom oxide layer to increase the first oxygen content to a second oxygen content adjacent the oxide/silicon interface; and depositing a nitride charge-storage layer on the bottom oxide layer. In another embodiment, process for reducing charge leakage in a SONOS flash memory device, including forming a bottom oxide layer of an ONO structure on a surface of the semiconductor substrate having an oxide/silicon interface with a super-stoichiometric oxygen content adjacent the oxide/silicon interface; and depositing a nitride charge-storage layer on the bottom oxide layer.