The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2006

Filed:

Dec. 26, 2002
Applicants:

Ho-ming Tong, Taipei, TW;

Chun-chi Lee, Kaohsiung, TW;

Jen-kuang Fang, Pingtung, TW;

Min-lung Huang, Kaohsiung, TW;

Jau-shoung Chen, Hsinchu Hsien, TW;

Ching-huei Su, Kaohsiung, TW;

Chao-fu Weng, Tainan, TW;

Yung-chi Lee, Kaohsiung, TW;

Inventors:

Ho-Ming Tong, Taipei, TW;

Chun-Chi Lee, Kaohsiung, TW;

Jen-Kuang Fang, Pingtung, TW;

Min-Lung Huang, Kaohsiung, TW;

Jau-Shoung Chen, Hsinchu Hsien, TW;

Ching-Huei Su, Kaohsiung, TW;

Chao-Fu Weng, Tainan, TW;

Yung-Chi Lee, Kaohsiung, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming bumps on the active surface of a silicon wafer. A first under-bump metallic layer is formed over the active surface of the wafer. A second under-bump metallic layer is formed over the first under-bump metallic layer. A portion of the second under-bump metallic layer is removed to expose the first under-bump metallic layer. A plurality of solder bumps is implanted onto the second under-bump metallic layer. The exposed first under-bump metallic layer is removed so that only the first under-bump metallic layer underneath the second under-bump metallic layer remains.


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