The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2005
Filed:
Sep. 30, 2002
Shiann-tsong Tsai, Hsinchu, TW;
Yu-ming Hsu, Hsinchu, TW;
Wen-lung Wu, Hsinchu, TW;
Kuen-huang Chen, Hsinchu, TW;
Wen-sheng Su, Hsinchu, TW;
Chin-hsing Lin, Hsinchu, TW;
Shiann-Tsong Tsai, Hsinchu, TW;
Yu-Ming Hsu, Hsinchu, TW;
Wen-Lung Wu, Hsinchu, TW;
Kuen-Huang Chen, Hsinchu, TW;
Wen-Sheng Su, Hsinchu, TW;
Chin-Hsing Lin, Hsinchu, TW;
Ultratera Corporation, Taiwan, CN;
Abstract
A strengthened window-type semiconductor package is provided. A substrate having an opening is mounted with at least a chip in a manner that, an active surface of the chip covers and partly exposed to the opening, and electrically connected to the substrate by bonding wires formed through the opening. An elastic non-conductive material is applied over the chip exclusive of the active surface. An upper encapsulant is formed to encapsulate the chip and the non-conductive material, and a lower encapsulant is formed to encapsulate the bonding wires and seal the opening. With provision of the non-conductive material for encapsulating the chip before forming the upper encapsulant, the chip can be prevented from cracking particularly at corner and edge positions that encounter relatively greater thermal stress during subsequent fabrication processes such as curing of the upper encapsulant and thermal cycles.