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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 5251806 B1

PDFFull Text
Date of Patent:
Oct. 12, 1993

Filed:

Apr. 16, 1992

Method of forming dual height solder interconnections

Applicant:
Inventors:

Birendra N Agarwala, Hopewell Junction, NY (US);

Aziz M Ahsan, Hopewell Junction, NY (US);

Arthur Bross, Poughkeepsie, NY (US);

Mark F Chadurjian, Essex Junction, VT (US);

Nicholas G Koopman, Hopewell Junction, NY (US);

Li-Chung Lee, Saratoga, CA (US);

Karl J Puttlitz, Wappingers Falls, NY (US);

Sudipta K Ray, Wappingers Falls, NY (US);

James G Ryan, Essex Junction, VT (US);

Joseph G Schaefer, Berkshire, NY (US);

Kamalesh K Srivastava, Wappingers Falls, NY (US);

Paul A Totta, Poughkeepsie, NY (US);

Erick G Walton, South Burlington, VT (US);

Adolf E Wirsing, South Hero, VT (US);

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorney:

Blecker; Ira David

Primary Examiner:

Kenneth J Ramsey

Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
22818022 ; 427 96 ; 427265 ;
Abstract

The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.

Find Patent Forward Citations

Agarwala, Birendra. (1993). Method of forming dual height solder interconnections (U.S. Patent No. 5251806). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5251806

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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