The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Aug. 26, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Pratik Koirala, Portland, OR (US);

Paul Nordeen, Hillsboro, OR (US);

Tushar Talukdar, Wilsonville, OR (US);

Kimin Jun, Portland, OR (US);

Thomas Hoff, Hillsboro, OR (US);

Han Wui Then, Portland, OR (US);

Nicole K. Thomas, Portland, OR (US);

Marko Radosavljevic, Portland, OR (US);

Paul B. Fischer, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 88/00 (2026.01); H10D 1/68 (2025.01); H10D 30/47 (2025.01); H10D 62/40 (2025.01); H10D 62/80 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 84/08 (2025.01); H10W 20/20 (2026.01);
U.S. Cl.
CPC ...
H10D 88/101 (2025.01); H10D 1/68 (2025.01); H10D 30/475 (2025.01); H10D 62/405 (2025.01); H10D 62/80 (2025.01); H10D 84/01 (2025.01); H10D 84/038 (2025.01); H10D 84/08 (2025.01); H10D 88/01 (2025.01); H10W 20/20 (2026.01);
Abstract

Gallium nitride (GaN) epitaxy on patterned substrates for integrated circuit technology is described. In an example, an integrated circuit structure includes a material layer including gallium and nitrogen, the material layer having a first side and a second side opposite the first side. A plurality of fins is on the first side of the material layer, the plurality of fins including silicon. A device layer is on the second side of the material layer, the device layer including one or more GaN-based devices.


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