The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2025
Filed:
Dec. 22, 2021
Intel Corporation, Santa Clara, CA (US);
Gurpreet Singh, Portland, OR (US);
Richard E. Schenker, Portland, OR (US);
Nityan Labros Nair, Portland, OR (US);
Nafees A. Kabir, Portland, OR (US);
Gauri Nabar, Hillsboro, OR (US);
Eungnak Han, Portland, OR (US);
Xuanxuan Chen, Hillsboro, OR (US);
Tayseer Mahdi, Beaverton, OR (US);
Brandon Jay Holybee, Portland, OR (US);
Charles Henry Wallace, Portland, OR (US);
Paul A. Nyhus, Portland, OR (US);
Manish Chandhok, Beaverton, OR (US);
Florian Gstrein, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Described herein are IC devices include tight-pitched patterned metal layers, such as metal gratings, and processes for forming such patterned metal layers. The processes include subtractive metal patterning, where portions of a metal layer are etched and replaced with an insulator to form the metal grating. Masks for etching portions of the metal layer are generated using directed self-assembly (DSA). In some examples, multiple etching steps are performed, e.g., to generate metal lines at a first pitch, and to add additional lines at half of the first pitch. In some examples, additive metal patterning is performed in addition to subtractive metal patterning.