The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2024
Filed:
Jul. 13, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Shu-Cheng Chin, Hsinchu, TW;
Ming-Yuan Gao, Hsinchu, TW;
Chen-Yi Niu, Hsinchu, TW;
Yen-Chun Lin, Hsinchu, TW;
Hsin-Ying Peng, Hsinchu, TW;
Chih-Hsiang Chang, Hsinchu, TW;
Pei-Hsuan Lee, Taipei, TW;
Chi-Feng Lin, Hsinchu, TW;
Chih-Chien Chi, Hsinchu, TW;
Hung-Wen Su, Jhubei, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A method of manufacturing an interconnect structure includes forming an opening through a dielectric layer. The opening exposes a top surface of a first conductive feature. The method further includes forming a barrier layer on sidewalls of the opening, passivating the exposed top surface of the first conductive feature with a treatment process, forming a liner layer over the barrier layer, and filling the opening with a conductive material. The liner layer may include ruthenium.