The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2024
Filed:
Dec. 21, 2020
Intel Corporation, Santa Clara, CA (US);
Noriyuki Sato, Hillsboro, OR (US);
Sarah Atanasov, Beaverton, OR (US);
Abhishek A. Sharma, Hillsboro, OR (US);
Bernhard Sell, Portland, OR (US);
Chieh-Jen Ku, Hillsboro, OR (US);
Arnab Sen Gupta, Hillsboro, OR (US);
Matthew V. Metz, Portland, OR (US);
Elliot N. Tan, Portland, OR (US);
Hui Jae Yoo, Portland, OR (US);
Travis W. Lajoie, Forest Grove, OR (US);
Van H. Le, Portland, OR (US);
Pei-Hua Wang, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit (IC) structure in a memory device is described. In an example, the IC structure includes a memory cell including a bitline (BL) extending along a first direction and a channel extending along a second direction above and diagonal to the BL. In the example, a wordline (WL) extends in a third direction perpendicular to the first direction of the BL and intersects with the channel to control a current in the channel along a gated channel length. In some examples, the channel is electrically coupled on a first side to a storage capacitor via a storage node contact (SNC) and on a second side to the BL via a bit line contact (BLC) located on an underside or backside of the channel.