The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2024
Filed:
Feb. 11, 2020
Intel Corporation, Santa Clara, CA (US);
Ziyin Lin, Chandler, AZ (US);
Vipul Mehta, Chandler, AZ (US);
Wei Li, Chandler, AZ (US);
Edvin Cetegen, Chandler, AZ (US);
Xavier Brun, Hillsboro, OR (US);
Yang Guo, Chandler, AZ (US);
Soud Choudhury, Chandler, AZ (US);
Shan Zhong, Chandler, AZ (US);
Christopher Rumer, Chander, AZ (US);
Nai-Yuan Liu, Chandler, AZ (US);
Ifeanyi Okafor, Chandler, AZ (US);
Hsin-Wei Wang, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An integrated circuit assembly may be formed comprising an electronic substrate, a first and second integrated circuit device each having a first surface, a second surface, at least one side extending between the first and second surface, and an edge defined at an intersection of the second surface and the at least one side of each respective integrated circuit device, wherein the first surface of each integrated circuit device is electrically attached to the electronic substrate, an underfill material between the first surface of each integrated circuit device and the electronic substrate, and between the sides of the first and second integrated circuit devices, and at least one barrier structure adjacent at least one of the edge of first integrated circuit device and the edge of the second integrated circuit device, wherein the underfill material abuts the at least one barrier structure.