The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2024
Filed:
Feb. 02, 2021
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Tsung-Ding Wang, Tainan, TW;
Yen-Fu Su, Hsinchu, TW;
Hao-Cheng Hou, Hsinchu, TW;
Jung-Wei Cheng, Hsinchu, TW;
Chien-Hsun Lee, Hsin-chu County, TW;
Hsin-Yu Pan, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A semiconductor package includes a semiconductor die, an encapsulant, a first and second dielectric layer, a through via, an extension pad, and a routing via. The semiconductor die includes a contact post. The first dielectric layer extends on the encapsulant. The through via extends through the first dielectric layer and has one end contacting the contact post. The extension pad is disposed on the first dielectric layer, contacting an opposite end of the through via with respect to the contact post. The extension pad has an elongated shape, a first end of the extension pad overlaps with the contact post and the through via, and a second end of the extension pad overlaps with the encapsulant. The second dielectric layer is disposed on the first dielectric layer and the extension pad. The routing via extends through the second dielectric layer to contact the second end of the extension pad.