The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2024
Filed:
Jul. 13, 2022
Intel Corporation, Santa Clara, CA (US);
Aaron D. Lilak, Beaverton, OR (US);
Anh Phan, Beaverton, OR (US);
Patrick Morrow, Portland, OR (US);
Willy Rachmady, Beaverton, OR (US);
Gilbert Dewey, Beaverton, OR (US);
Jessica M. Torres, Portland, OR (US);
Kimin Jun, Portland, OR (US);
Tristan A. Tronic, Aloha, OR (US);
Christopher J. Jezewski, Portland, OR (US);
Hui Jae Yoo, Hillsboro, OR (US);
Robert S. Chau, Beaverton, OR (US);
Chi-Hwa Tsang, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A stacked device structure includes a first device structure including a first body that includes a semiconductor material, and a plurality of terminals coupled with the first body. The stacked device structure further includes an insulator between the first device structure and a second device structure. The second device structure includes a second body such as a fin structure directly above the insulator. The second device structure further includes a gate coupled to the fin structure, a spacer including a dielectric material adjacent to the gate, and an epitaxial structure adjacent to a sidewall of the fin structure and between the spacer and the insulator. A metallization structure is coupled to a sidewall surface of the epitaxial structure, and further coupled with one of the terminals of the first device.