The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2023
Filed:
May. 22, 2020
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Ru-Gun Liu, Hsinchu County, TW;
Cheng-Hsiung Tsai, Miaoli County, TW;
Chung-Ju Lee, Hsinchu, TW;
Chih-Ming Lai, Hsinchu, TW;
Chia-Ying Lee, New Taipei, TW;
Jyu-Horng Shieh, Hsin-Chu, TW;
Ken-Hsien Hsieh, Taipei, TW;
Ming-Feng Shieh, Tainan County, TW;
Shau-Lin Shue, Hsinchu, TW;
Shih-Ming Chang, Hsin-Chu, TW;
Tien-I Bao, Taoyuan County, TW;
Tsai-Sheng Gau, HsinChu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method includes forming a first layer on a substrate; forming a first plurality of trenches in the first layer by a patterning process; and forming a second plurality of trenches in the first layer by another patterning process, resulting in combined trench patterns in the first layer. A first trench of the second plurality connects two trenches of the first plurality. The method further includes forming dielectric spacer features on sidewalls of the combined trench patterns. A space between two opposing sidewalls of the first trench is completely filled by the dielectric spacer features and another space between two opposing sidewalls of one of the two trenches is partially filled by the dielectric spacer features.