The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2022

Filed:

Feb. 27, 2020
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Chia-Hao Hsu, Hsinchu, TW;

Tai-Yu Chen, Hsinchu, TW;

Shiann-Tsong Tsai, Hsinchu, TW;

Hsing-Chih Liu, Hsinchu, TW;

Yao-Pang Hsu, Hsinchu, TW;

Chi-Yuan Chen, Hsinchu, TW;

Chung-Fa Lee, Hsinchu, TW;

Assignee:

MediaTek Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); H01L 23/66 (2006.01); H01L 23/367 (2006.01); H01L 23/373 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01Q 1/02 (2006.01); H01Q 1/22 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 23/3672 (2013.01); H01L 23/3733 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01Q 1/02 (2013.01); H01Q 1/2283 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/0103 (2013.01); H01L 2924/014 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01049 (2013.01); H01L 2924/01051 (2013.01); H01L 2924/01083 (2013.01); H01L 2924/18161 (2013.01);
Abstract

A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.


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