The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2022
Filed:
Sep. 29, 2017
Intel Corporation, Santa Clara, CA (US);
Omkar Karhade, Chandler, AZ (US);
Robert L. Sankman, Phoenix, AZ (US);
Nitin A. Deshpande, Chandler, AZ (US);
Mitul Modi, Phoenix, AZ (US);
Thomas J. De Bonis, Tempe, AZ (US);
Robert M. Nickerson, Chandler, AZ (US);
Zhimin Wan, Chandler, AZ (US);
Haifa Hariri, Phoenix, AZ (US);
Sri Chaitra J. Chavali, Chandler, AZ (US);
Nazmiye Acikgoz Akbay, Chandler, AZ (US);
Fadi Y. Hafez, Phoenix, AZ (US);
Christopher L. Rumer, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The present disclosure is directed to systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A thermally conductive member that includes at least one thermally conductive member may be disposed between the first semiconductor package and the second semiconductor package. The thermally conductive member may include: a single thermally conductive element; multiple thermally conductive elements; or a core that includes at least one thermally conductive element. The thermally conductive elements are thermally conductively coupled to an upper surface of the first semiconductor package and to the lower surface of the second semiconductor package to facilitate the transfer of heat from the first semiconductor package to the second semiconductor package.