The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Mar. 30, 2018
Intel Corporation, Santa Clara, CA (US);
Walid M. Hafez, Portland, OR (US);
Sridhar Govindaraju, Portland, OR (US);
Mark Liu, West Linn, OR (US);
Szuya S. Liao, Portland, OR (US);
Chia-Hong Jan, Portland, OR (US);
Nick Lindert, Portland, OR (US);
Christopher Kenyon, Portland, OR (US);
Sairam Subramanian, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Unidirectional self-aligned gate endcap (SAGE) architectures with gate-orthogonal walls, and methods of fabricating unidirectional self-aligned gate endcap (SAGE) architectures with gate-orthogonal walls, are described. In an example, integrated circuit structure includes a first semiconductor fin having a cut along a length of the first semiconductor fin. A second semiconductor fin has a cut along a length of the second semiconductor fin. A gate endcap isolation structure is between the first semiconductor fin and the second semiconductor fin. The gate endcap isolation structure has a substantially uniform width along the lengths of the first and second semiconductor fins.