The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2021
Filed:
Apr. 02, 2018
Intel Corporation, Santa Clara, CA (US);
Sairam Subramanian, Portland, OR (US);
Walid M. Hafez, Portland, OR (US);
Sridhar Govindaraju, Portland, OR (US);
Mark Liu, West Linn, OR (US);
Szuya S. Liao, Portland, OR (US);
Chia-Hong Jan, Portland, OR (US);
Nick Lindert, Portland, OR (US);
Christopher Kenyon, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Dual self-aligned gate endcap (SAGE) architectures, and methods of fabricating dual self-aligned gate endcap (SAGE) architectures, are described. In an example, an integrated circuit structure includes a first semiconductor fin having a cut along a length of the first semiconductor fin. A second semiconductor fin is parallel with the first semiconductor fin. A first gate endcap isolation structure is between the first semiconductor fin and the second semiconductor fin. A second gate endcap isolation structure is in a location of the cut along the length of the first semiconductor fin.