The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 2021
Filed:
Apr. 10, 2020
Lam Research Corporation, Fremont, CA (US);
Xiang Zhou, Santa Clara, CA (US);
Naveed Ansari, Fremont, CA (US);
Yoshie Kimura, Castro Valley, CA (US);
Si-Yi Yi Li, Fremont, CA (US);
Kazi Sultana, Fremont, CA (US);
Radhika Mani, Fremont, CA (US);
Duming Zhang, Union City, CA (US);
Haseeb Kazi, Santa Clara, CA (US);
Chen Xu, Pasadena, CA (US);
Mitchell Brooks, Aptos, CA (US);
Ganesh Upadhyaya, Pleasanton, CA (US);
Lam Research Corporation, Fremont, CA (US);
Abstract
Methods and apparatuses for reducing roughness using integrated atomic layer deposition (ALD) and etch processes are described herein. In some implementations, after a mask is provided on a substrate, methods include depositing a conformal layer on the mask by ALD to reduce roughness and etching a layer underlying the mask to form patterned features having a reduced roughness. In some implementations, after a substrate is etched to a first depth to form features at the first depth in the substrate, methods include depositing a conformal layer by ALD on sidewalls of the features to protect sidewalls and reduce roughness during a subsequent etch process. The ALD and etch processes may be performed in a plasma chamber.