Yu-Ho Chiang

Title: Yu-Ho Chiang: Semiconductor Inventions and Patent Contributions.

Introduction

Yu-Ho Chiang is an inventor based in Hsinchu, Taiwan. His patent work focuses on semiconductor device structures and manufacturing methods. He is associated with Taiwan Semiconductor Manufacturing Company Limited and has 3 patents.

Latest Patents

Chiang’s listed recent patents address FinFET structures and semiconductor isolation.

“Semiconductor Structure Including Bottom Isolation and Method for Manufacturing the Same” describes a structure with two fin portions and corresponding devices separated by an isolation portion. A hard mask beneath the isolation includes a main region and two sidewall regions. The regions use different materials to separate and isolate the fin portions.

“Fin Field Effect Transistor (FinFET) Device Structure with Hard Mask Layer over Gate Structure and Method for Forming the Same” presents a method for forming a FinFET device. The process forms a fin, source/drain structure, inter-layer dielectric, and gate structure, then adds two hard mask layers over the gate. It also describes simultaneously etching an opening in the dielectric to expose the source/drain structure and forming a recess in the second hard mask layer.

Career Highlights

Chiang’s disclosed inventions concern semiconductor fabrication, including isolation between fin structures and hard-mask arrangements in FinFET devices. These approaches address structural design and process integration in advanced semiconductor manufacturing.

Collaborations

Chiang’s listed coworkers include Jyh-Huei Chen and Cheng-Han Wu. His company affiliation connects his patent work with Taiwan Semiconductor Manufacturing Company Limited.

Conclusion

Yu-Ho Chiang’s patent portfolio reflects work on semiconductor structures and manufacturing processes, particularly bottom isolation and hard-mask techniques for FinFET devices.