The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2021
Filed:
Nov. 26, 2018
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Cheng-Han Wu, Hsinchu, TW;
Yu-Ho Chiang, Hsinchu, TW;
Jyh-Huei Chen, Hsinchu, TW;
Jhon-Jhy Liaw, Zhudong Township, Hsinchu County, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A method for forming a FinFET device structure is provided. The method for forming a FinFET device structure includes forming a fin structure over a substrate, and forming a source/drain (S/D) structure over the fin structure. The method for forming a FinFET device structure also includes forming an inter-layer dielectric (ILD) structure covering the S/D structure, and forming a gate structure over the fin structure and adjacent to the S/D structure. The method for forming a FinFET device structure further includes forming a first hard mask layer over the gate structure, and forming a second hard mask layer over the first hard mask layer. In addition, the method for forming a FinFET device structure includes etching the ILD structure to form an opening exposing the S/D structure. The opening and a recess in the second hard mask layer are formed simultaneously.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile