Fukuoka, Japan

Yoshihiro Minamoto


Average Co-Inventor Count = 5.0

ph-index = 2

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 2011

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5 patents (USPTO):Explore Patents

Title: Innovations of Yoshihiro Minamoto

Introduction

Yoshihiro Minamoto is a notable inventor based in Fukuoka, Japan. He has made significant contributions to the field of logic circuit testing, holding a total of five patents. His work focuses on enhancing the efficiency and effectiveness of test patterns used in logic circuits.

Latest Patents

Minamoto's latest patents include a conversion device, conversion method, program, and recording medium. This invention provides a conversion device designed to transform an initial test pattern into a test pattern with a different bit constitution of logic values. It ensures that the fault coverage of transition delay faults remains intact. The conversion device effectively converts an initial test pattern for a logic circuit into an intermediate test pattern, utilizing at least two test vectors applied in succession. Additionally, he has developed a generation device that creates a test vector aimed at reducing capture power efficiently. This device assigns logic values to unspecified bits within a test cube, optimizing the logic circuit's performance.

Career Highlights

Throughout his career, Yoshihiro Minamoto has worked with esteemed organizations such as the Japan Science and Technology Agency and the Kyushu Institute of Technology. His experience in these institutions has allowed him to refine his expertise in logic circuit testing and innovation.

Collaborations

Minamoto has collaborated with notable colleagues, including Seiji Kajihara and Kohei Miyase. Their joint efforts have contributed to advancements in the field of logic circuit testing.

Conclusion

Yoshihiro Minamoto's innovative work in the realm of logic circuits has led to significant advancements in testing methodologies. His contributions continue to influence the industry and enhance the reliability of logic circuits.

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