The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2011
Filed:
Oct. 24, 2007
Xiaoqing Wen, Fukuoka, JP;
Seiji Kajihara, Fukuoka, JP;
Kohei Miyase, Fukuoka, JP;
Yoshihiro Minamoto, Fukuoka, JP;
Hiroshi Date, Fukuoka, JP;
Xiaoqing Wen, Fukuoka, JP;
Seiji Kajihara, Fukuoka, JP;
Kohei Miyase, Fukuoka, JP;
Yoshihiro Minamoto, Fukuoka, JP;
Hiroshi Date, Fukuoka, JP;
Japan Science & Technology Agency, Saitama, JP;
Kyushu Institute of Technology, Fukuoka, JP;
System JD Co., Ltd., Fukuoka, JP;
Abstract
Provided are a diagnostic device and the like providing a favorable diagnosis result by further improving the diagnosis resolution. A diagnostic devicehas a symbol injection part, which is composed of a symbol injection part for an active elementand a symbol injection part for a passive element, an occurrence probability providing part, an equal occurrence probability providing part, and a switching part. A per-test X-fault diagnosis flow by the diagnostic deviceconsists of a stage for collecting diagnostic information and a stage for drawing diagnostic conclusion. The layout of a deep-submicron LSI circuit usually needs to involve multiple layers, which means that vias are extensively used. Since via information is utilized by the symbol injection part for a passive element, it becomes possible to locate defects to the via level, greatly improving the diagnostic resolution. Since, by the occurrence probability providing part, a new diagnosis value is used and, the occurrence probabilities of possible faulty logic combinations are taken into consideration, the reality in a deep-submicron LSI circuit is better reflected, which contributes to the improvement of diagnostic resolution.