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For the Inventor, By the Inventor

Hsinchu, Taiwan

Ying-Yu Hsu

This inventor holds 24 USPTO granted patents and 2 published patent applications and 1 EPO patent, primarily in Stacked Chip Design. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Mediatek Corporation. Active years: 2011-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ying-Yu Hsu. Retrieved from https://idiyas.com/inventor/ying-yu-hsu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 24 

% Patents Active = 62.5

 

Average Co-Inventor Count = 1.7

ph-index = 4

Forward Citations = 47(Granted Patents)


Company Filing History:

goldMedal21 out of 42,965 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal3 out of 5,127 
 
Mediatek Corporation
 patents

Years Active: 2011-2023

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Areas of Expertise:
Intrinsic Timing Utilization
Transceiver Module
Data Sampling Alignment
On-Chip Eye Diagram
3D Chip Stack
Impedance Calibration
High Speed Communication
Low Supply-Voltage Memory
Driver Circuit
Thermal Management
Chip Layout Method
24 patents (USPTO):Explore Patents
1. 11569805 - Minimum intrinsic timing utilization auto alignment on multi-die system (2023-01-31),
2. 11188701 - Stacked chip layout (2021-11-30),
3. 10540473 - Stacked chip layout and method of making the same (2020-01-21),
4. 10447466 - Transceiver and clock generation module (2019-10-15),
5. 10162926 - Stacked chip layout having overlapped regions (2018-12-25),
6. 10158352 - Delay signal generating apparatus using glitch free digitally controlled delay line and associated delay signal generating method (2018-12-18),
7. 9965409 - Data sampling alignment method for memory interface (2018-05-08),
8. 9766288 - On-chip eye diagram capture (2017-09-19),
9. 9748241 - Semiconductor device for simultaneous operation at two temperature ranges (2017-08-29),
10. 9619409 - Data sampling alignment method for memory inferface (2017-04-11),
11. 9564900 - Supply boost device (2017-02-07),
12. 9503061 - System and method for calibrating chips in a 3D chip stack architecture (2016-11-22),
13. 9495500 - Method of making stacked chip layout (2016-11-15),
14. 9419615 - Driver circuit (2016-08-16),
15. 9363115 - System and method for aligning data bits (2016-06-07),

Title: Inventor Ying-Yu Hsu

Introduction: Ying-Yu Hsu is a renowned inventor hailing from Hsinchu, Taiwan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Ying-Yu Hsu holds several patents in the areas of semiconductor technology, renewable energy, and artificial intelligence, showcasing his diverse range of expertise and innovative thinking.

Career Highlights: With a career spanning over two decades, Ying-Yu Hsu has worked with leading tech companies and research institutions, playing a pivotal role in developing cutting-edge technologies that have revolutionized various industries.

Collaborations: Throughout his career, Ying-Yu Hsu has collaborated with top researchers, engineers, and scientists from around the world, fostering a culture of innovation and knowledge sharing to drive progress in the field of technology.

Conclusion: Ying-Yu Hsu's passion for innovation, coupled with his technical acumen and collaborative spirit, has solidified his reputation as a visionary inventor at the forefront of technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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