Delay signal generating apparatus using glitch free digitally controlled delay line and associated delay signal generating method

Abstract

A delay signal generating apparatus has a digitally controlled delay line and a control circuit. The digitally controlled delay line has a coarse delay circuit and a fine delay circuit. The coarse delay circuit generates a plurality of coarse delay signals by applying a plurality of different coarse delay amounts to an input signal, respectively, wherein the different coarse delay amounts are set by a first control input. The fine delay circuit generates a fine delay signal having a fine delay amount with respect to the input signal by performing phase interpolation based on the coarse delay signals, wherein the fine delay amount is set by a second control input. The control circuit generates the first control input to the coarse delay circuit, and generates the second control input to the fine delay circuit, wherein the control circuit does not change the first control input unless one of the coarse delay signals has no contribution to the fine delay signal according to the second control input.