The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2017

Filed:

Jan. 08, 2013
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Ying-Yu Hsu, Hsinchu, TW;

Chien-Chun Tsai, Jhudong Township, TW;

Wen-Hung Huang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/16 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1689 (2013.01); G06F 12/0246 (2013.01);
Abstract

The present disclosure relates to an interface comprising a memory controller and a memory unit coupled to the memory controller and configured to communicate with the memory controller through a first signal and a second signal. The interface further comprises a determination unit comprising judgment logic configured to send a control signal configured to align the first signal with the second signal. The memory controller further comprises a digitally-controlled delay line (DCDL) coupled to the determination unit and configured to receive the control signal, wherein the determination unit instructs the DCDL to adjust a delay of the first signal to align the first signal with the second signal. The memory controller further comprises a value register configured to store a signal delay value corresponding to alignment between the first signal with the second signal which is contained within the control signal. Other devices and methods are disclosed.


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