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For the Inventor, By the Inventor

Taipei, Taiwan

Yi-Lin Chuang

USPTO Granted Patents = 49 

Average Co-Inventor Count = 3.5

ph-index = 5

Forward Citations = 102(Granted Patents)


Location History:

  • Taipei, TW (2014 - 2024)
  • Hsinchu, TW (2022 - 2024)

Company Filing History:

goldMedal49 out of 40,780 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal6 out of 98 
 
TSMC Nanjing Company, Limited
 patents
where one patent can have more than one assignee

Years Active: 2014-2025

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Areas of Expertise:
Circuit Synthesis Optimization
Integrated Circuit Design
Layout Design Generation
Design Rule Check Violations
Static Voltage Drop Prediction
Machine Learning Design Enablement
Floor Plan Optimization
Inter-Layer Vias
Timing Optimization
Semiconductor Device Layout
Congestion Optimization
Clock Network Topology
49 patents (USPTO):Explore Patents
1. 12340158 - Circuit synthesis optimization for implements on integrated circuit (2025-06-24),
2. 12321682 - Post-routing congestion optimization (2025-06-03),
3. 12299376 - Hard-to-fix (HTF) design rule check (DRC) violations prediction (2025-05-13),
4. 12242788 - Method and system for generating layout design of integrated circuit (2025-03-04),
5. 12216980 - Method and system for fixing violation of layout (2025-02-04),
6. 12154851 - Method of forming a semiconductor device with inter-layer vias (2024-11-26),
7. 12106034 - Rule check violation prediction systems and methods (2024-10-01),
8. 12099793 - Rule check violation prediction systems and methods (2024-09-24),
9. 12039251 - Cell layout of semiconductor device (2024-07-16),
10. 12039249 - System and method for diagnosing design rule check violations (2024-07-16),
11. 12019971 - Static voltage drop (SIR) violation prediction systems and methods (2024-06-25),
12. 11928415 - Hard-to-fix (HTF) design rule check (DRC) violations prediction (2024-03-12),
13. 11900037 - Circuit synthesis optimization for implements on integrated circuit (2024-02-13),
14. 11893334 - Method for optimizing floor plan for an integrated circuit (2024-02-06),
15. 11853681 - Post-routing congestion optimization (2023-12-26),

Title: The Innovative Journey of Yi-Lin Chuang

Introduction: Yi-Lin Chuang, a talented inventor hailing from Taipei, Taiwan, has made significant contributions to the world of technology through his groundbreaking innovations.

Latest Patents: Yi-Lin Chuang holds several patents in the field of electronics and telecommunications, with his most recent patent focusing on a revolutionary method for enhancing data transmission speeds in wireless networks.

Career Highlights: With a career spanning over two decades, Yi-Lin Chuang has worked for various tech companies, leading research teams and spearheading projects that have pushed the boundaries of what is possible in the realm of wireless communication.

Collaborations: Throughout his career, Yi-Lin Chuang has collaborated with top engineers, researchers, and scientists from around the globe, fostering a culture of innovation and creativity that has resulted in numerous successful projects and patents.

Conclusion: Yi-Lin Chuang's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and engineers, solidifying his legacy as a true pioneer in the world of electronics and telecommunications.

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