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For the Inventor, By the Inventor

Shiga, Japan

Yasumitsu K Orii

This inventor holds 17 USPTO granted patents and 3 published patent applications. Top assignee: International Business Machines Corporation. Active years: 1999-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasumitsu K Orii. Retrieved from https://idiyas.com/inventor/yasumitsu-k-orii

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 17 

% Patents Active = 52.9

Average Co-Inventor Count = 4.3

ph-index = 2

Forward Citations = 36(Granted Patents)


Location History:

  • Kanzaki-gun, JP (1999)
  • Shiga, JP (2009 - 2010)
  • Ohmi, JP (2010)
  • Higashiomi, JP (2016)
  • Shiga-ken, JP (2015 - 2018)
  • Higashi Ohmi, JP (2017 - 2019)
  • Kawasaki, JP (2016 - 2020)

Company Filing History:

goldMedal17 out of 166,351 
 
International Business Machines Corporation
 patents

Years Active: 1999-2020

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17 patents (USPTO):Explore Patents
1. 10840202 - Method of forming solder bumps (2020-11-17),
2. 10833035 - Method of forming solder bumps (2020-11-10),
3. 10797011 - Method of forming solder bumps (2020-10-06),
4. 10252363 - Forming a solder joint between metal layers (2019-04-09),
5. 10115692 - Method of forming solder bumps (2018-10-30),
6. 9941230 - Electrical connecting structure between a substrate and a semiconductor chip (2018-04-10),
7. 9698119 - Interfacial alloy layer for improving electromigration (EM) resistance in solder joints (2017-07-04),
8. 9586281 - Forming a solder joint between metal layers (2017-03-07),
9. 9520375 - Method of forming a solder bump on a substrate (2016-12-13),
10. 9466533 - Semiconductor structure including a through electrode, and method for forming the same (2016-10-11),
11. 9391034 - Interfacial alloy layer for improving electromigration (EM) resistance in solder joints (2016-07-12),
12. 9373545 - Semiconductor structure including a through electrode, and method for forming the same (2016-06-21),
13. 9099315 - Mounting structure and mounting structure manufacturing method (2015-08-04),
14. 7682936 - Reduction in thickness of semiconductor component on substrate (2010-03-23),
15. 7674651 - Mounting method for semiconductor parts on circuit substrate (2010-03-09),

Title: Yasumitsu K Orii - Pioneering Inventor from Shiga-ken, Japan

Introduction: Yasumitsu K Orii is a distinguished inventor hailing from Shiga-ken, Japan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Yasumitsu K Orii holds several patents in various technological domains, showcasing his continuous commitment to pushing the boundaries of innovation.

Career Highlights: Throughout his illustrious career, Yasumitsu K Orii has demonstrated a remarkable ability to transform inventive ideas into tangible solutions that have significantly impacted the tech industry.

Collaborations: Yasumitsu K Orii has collaborated with leading tech companies and research institutions, fostering a culture of innovation and knowledge-sharing that has led to the development of cutting-edge technologies.

Conclusion: Yasumitsu K Orii's relentless pursuit of innovation and his passion for creating solutions that make a difference have solidified his reputation as a visionary inventor in the tech world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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