Yang-Trung Lin

Title: Innovations of Yang-Trung Lin

Introduction

Yang-Trung Lin is a notable inventor based in San Jose, CA. He has made significant contributions to the field of logic system design, holding a total of 3 patents. His work focuses on enhancing the efficiency and reliability of electronic systems through innovative methodologies.

Latest Patents

One of his latest patents is titled "Method and system for tracing error of logic system design." This invention outlines a method for tracing errors in logic system designs by utilizing machine learning models to analyze sub-circuits. The process involves backtracing to identify potential root causes of assertion failures in combinational cones. Another significant patent is "Generating physically aware network-on-chip design from a physical system-on-chip specification." This patent describes methods for automatically generating network-on-chip designs based on various architectural and physical specifications, ensuring optimal performance and efficiency.

Career Highlights

Yang-Trung Lin has worked with prominent companies in the technology sector, including Cadence Design Systems, Inc. and Netspeed Systems. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking innovations in electronic design automation.

Collaborations

Throughout his career, Yang-Trung Lin has collaborated with esteemed professionals in the industry, including Steven L. Teig and Oscar Buset. These collaborations have further enriched his work and expanded the impact of his inventions.

Conclusion

Yang-Trung Lin's contributions to the field of logic system design and network-on-chip technology demonstrate his innovative spirit and commitment to advancing electronic systems. His patents reflect a deep understanding of complex design challenges and offer solutions that enhance the functionality of modern technology.