Eden Prairie, MN, United States of America

William L Larson

This inventor holds 18 USPTO granted patents, primarily in Magneto-Resistive Memory. Top assignees: Micron Technology Incorporated, Cypress Semiconductor Corporation, Honeywell International Inc.. Active years: 1997-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: William L Larson. Retrieved from https://idiyas.com/inventor/william-l-larson

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 88.9

Average Co-Inventor Count = 2.9

ph-index = 7

Forward Citations = 171(Granted Patents)


Location History:

  • Eden Praire, MN (US) (2005)
  • Eden Prairie, MN (US) (1997 - 2008)

Company Filing History:


Years Active: 1997-2008

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Areas of Expertise:
Magneto-Resistive
MRAM
Passivation
Tuning Range
Write Selectivity
Bit Structure
Multi-Layer Gate
Overvoltage Protection
Pin Diodes
Architecture
Manufacture Methods
Selective Writing
18 patents (USPTO):Explore Patents

Title: The Innovations of William L. Larson

Introduction

William L. Larson is a notable inventor based in Eden Prairie, MN (US). He holds a total of 18 patents that showcase his contributions to the field of technology. His work primarily focuses on advancements in semiconductor technology and related areas.

Latest Patents

Among his latest patents is the "Passivated magneto-resistive bit structure and passivation method therefor." This invention involves a passivated magneto-resistive bit structure designed to protect surfaces from oxidation or corrosion. In one embodiment, the bit structure is encapsulated using an etch stop barrier material. In another embodiment, the etch stop barrier material safeguards the top of the bit structure while dielectric spacers protect the side walls. Another significant patent is the "Varactor with improved tuning range." This invention features a varactor that includes a series of alternating P− wells and N+ regions formed in a silicon layer. Each P− well creates a first N+/P− junction with the adjacent N+ region on one side and a second N+/P− junction on the opposite side. A gate oxide is placed over each P− well, with gate silicon positioned above each gate oxide. The potential across the gate silicons and the N+ regions regulates the capacitance of the varactor.

Career Highlights

William L. Larson has had a distinguished career, working with prominent companies such as Micron Technology Incorporated and Cypress Semiconductor Corporation. His experience in these organizations has significantly contributed to his expertise and innovative capabilities.

Collaborations

Throughout his career, Larson has collaborated with talented individuals, including Harry Liu and Shaoping Li. These partnerships have likely fostered a creative environment that has led to the development of his innovative patents.

Conclusion

William L. Larson's contributions to technology through his patents and collaborations highlight his role as a significant inventor in the field. His work continues to influence advancements in semiconductor technology and related areas.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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