IDiyas

For the Inventor, By the Inventor

Newark, CA, United States of America

William K Lam

USPTO Granted Patents = 14

Average Co-Inventor Count = 2.1

ph-index = 5

Forward Citations = 71(Granted Patents)


Location History:

  • Fremont, CA (US) (2002)
  • Newark, CA (US) (2004 - 2009)

Company Filing History:

goldMedal14 out of 7,642 
 
Sun Microsystems, Inc.
 patents

Years Active: 2002-2009

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14 patents (USPTO):Explore Patents
1. 7475369 - Eliminate false passing of circuit verification through automatic detecting of over-constraining in formal verification (2009-01-06),
2. 7454726 - Technique for generating input stimulus to cover properties not covered in random simulation (2008-11-18),
3. 7447621 - PLI-less co-simulation of ISS-based verification systems in hardware simulators (2008-11-04),
4. 7424418 - Method for simulation with optimized kernels and debugging with unoptimized kernels (2008-09-09),
5. 7246053 - Method for transforming behavioral architectural and verification specifications into cycle-based compliant specifications (2007-07-17),
6. 7236917 - Method and apparatus for generating minimal node data and dynamic assertions for a simulation (2007-06-26),
7. 7051303 - Method and apparatus for detection and isolation during large scale circuit verification (2006-05-23),
8. 7017150 - Method and apparatus for automatically isolating minimal distinguishing stimuli in design verification and software development (2006-03-21),
9. 6988266 - Method of transforming variable loops into constant loops (2006-01-17),
10. 6775810 - Boosting simulation performance by dynamically customizing segmented object codes based on stimulus coverage (2004-08-10),
11. 6715134 - Method and apparatus to facilitate generating simulation modules for testing system designs (2004-03-30),
12. 6678868 - Using Boolean expressions to represent shapes within a layout of an integrated circuit (2004-01-13),
13. 6389576 - Method and apparatus for optimizing real functions in Boolean domain (2002-05-14),
14. 6389376 - Method and apparatus for generating n-segment steiner trees (2002-05-14),
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