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For the Inventor, By the Inventor

Steilacoom, WA, United States of America

Warren Morrow

USPTO Granted Patents = 19 

Average Co-Inventor Count = 3.0

ph-index = 7

Forward Citations = 230(Granted Patents)


Company Filing History:

goldMedal18 out of 54,664 
 
Intel Corporation
 patents
silverMedal1 out of 82 
 
Tahoe Research, Ltd.
 patents

Years Active: 2002-2024

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19 patents (USPTO):Explore Patents
1. 12046577 - Stacked memory with interface providing offset interconnects (2024-07-23),
2. 9768148 - Stacked memory with interface providing offset interconnects (2017-09-19),
3. 8971087 - Stacked memory with interface providing offset interconnects (2015-03-03),
4. 8510612 - Disabling outbound drivers for a last memory buffer on a memory channel (2013-08-13),
5. 8489944 - Disabling outbound drivers for a last memory buffer on a memory channel (2013-07-16),
6. 8286039 - Disabling outbound drivers for a last memory buffer on a memory channel (2012-10-09),
7. 8135999 - Disabling outbound drivers for a last memory buffer on a memory channel (2012-03-13),
8. 8020056 - Memory channel with bit lane fail-over (2011-09-13),
9. 7761753 - Memory channel with bit lane fail-over (2010-07-20),
10. 7386768 - Memory channel with bit lane fail-over (2008-06-10),
11. 7366368 - Optical add/drop interconnect bus for multiprocessor architecture (2008-04-29),
12. 7318130 - System and method for thermal throttling of memory modules (2008-01-08),
13. 7269481 - Method and apparatus for memory bandwidth thermal budgetting (2007-09-11),
14. 7130229 - Interleaved mirrored memory systems (2006-10-31),
15. 7076618 - Memory controllers with interleaved mirrored memory modes (2006-07-11),

Title: Innovations of Warren Morrow: A Journey Through Stacked Memory Technology

Introduction

Warren Morrow, an accomplished inventor based in Steilacoom, WA, has made significant contributions to the field of memory technology, holding a remarkable total of 19 patents. His work has influenced the development of advanced memory devices, showcasing innovative designs that meet the demands of modern computing.

Latest Patents

Morrow's latest patent, titled "Stacked Memory with Interface Providing Offset Interconnects," represents a pivotal advancement in memory device architecture. This invention includes a memory stack coupled with a system element, composed of multiple memory die layers. Each layer features a unique interface that allows data interface pins to connect efficiently with offset interconnects. Such an innovative design enhances data transmission while maintaining effectiveness in spatial limitations present in electronic devices.

Career Highlights

Over the years, Warren Morrow has worked with several prominent companies, including Intel Corporation and Tahoe Research, Ltd. His experience at these institutions allowed him to hone his skills and deepen his understanding of memory technologies, ultimately leading to his groundbreaking inventions. With a focus on continuous improvement, Morrow has been at the forefront of pushing the boundaries of what memory systems can achieve.

Collaborations

Throughout his career, Morrow has had the opportunity to collaborate with notable colleagues, including Pete D. Vogt and Dennis W. Brzezinski. These professional relationships have fostered an environment of innovation, allowing for the exchange of ideas and advancements that have significantly contributed to the field of memory technology.

Conclusion

Warren Morrow’s dedication to innovation and excellence in the realm of memory technology is reflected in his impressive portfolio of patents. With his recent work on stacked memory devices, he continues to pave the way for future advancements. His contributions not only influence contemporary technology but also inspire the next generation of inventors in this dynamic field.

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