The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2010
Filed:
Jun. 09, 2008
Applicants:
Pete D. Vogt, Boulder, CO (US);
Dennis W. Brzezinski, Sunnyvale, CA (US);
Warren R. Morrow, Steilacoom, WA (US);
Inventors:
Pete D. Vogt, Boulder, CO (US);
Dennis W. Brzezinski, Sunnyvale, CA (US);
Warren R. Morrow, Steilacoom, WA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory device or interface, and a fail-over circuit coupled between the plurality of bit lanes and the memory device or interface.
Quick Actions:
Vogt, Pete. (2010). Memory channel with bit lane fail-over (U.S. Patent No. 7761753). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7761753
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile