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For the Inventor, By the Inventor

Nampa, ID, United States of America

Warren M Farnworth

This inventor holds 777 USPTO granted patents and 6 published patent applications and 1 EPO patent, primarily in Semiconductor Technology (CPC class G01R3-102). Top assignees: Micron Technology Incorporated, Aptina Imaging Corporation, Micron Semiconductor, Inc.. Active years: 1990-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Warren M Farnworth. Retrieved from https://idiyas.com/inventor/warren-m-farnworth

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 777 

% Patents Active = 75.3


Average Co-Inventor Count = 2.2

ph-index = 80

Forward Citations = 24,411(Granted Patents)

Forward Citations (Not Self Cited) = 21,020(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Nampo, ID (US) (1999)
  • Boise, ID (US) (1991 - 2002)
  • Nampa, IN (US) (2004)
  • Nampa, ID (US) (1990 - 2022)

Company Filing History:

goldMedal754 out of 39,253 
 
Micron Technology Incorporated
 patents
silverMedal7 out of 580 
 
Aptina Imaging Corporation
 patents
bronzeMedal3 out of 156 
 
Micron Semiconductor, Inc.
 patents
4. 3 out of 428 
 
Round Rock Research, LLC
 patents
5. 1 out of 1 
 
Micron Custom Manufacturing, Inc. USA
 patent
6. 1 out of 432 
 
Micron Electronics, Inc.
 patents
7. 8 out of 834,570 
Other
 patents

Years Active: 1990-2022

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Areas of Expertise:
Wafer Imaging
Microelectronic Devices
Interconnect Structures
Through-Silicon Vias
Backside Redistribution Layers
Electrostatic Carriers
Integrated Circuit Contacts
Flexible Column Die
Heat Dissipation
Electronic Device Packages
Photoimager Wafers
Microfeature Devices
777 patents (USPTO):Explore Patents
1. 11450577 - Methods and systems for imaging and cutting semiconductor wafers and other semiconductor workpieces (2022-09-20),
2. 11075146 - Microfeature workpieces having alloyed conductive structures, and associated methods (2021-07-27),
3. 10541192 - Microfeature workpieces having alloyed conductive structures, and associated methods (2020-01-21),
4. 9737947 - Microfeature workpieces having alloyed conductive structures, and associated methods (2017-08-22),
5. 9579825 - Methods and systems for imaging and cutting semiconductor wafers and other semiconductor workpieces (2017-02-28),
6. 9337162 - Multi-component integrated circuit contacts (2016-05-10),
7. 9165888 - Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods (2015-10-20),
8. 8963292 - Semiconductor device having backside redistribution layers and method for fabricating the same (2015-02-24),
9. 8951858 - Imager device with electric connections to electrical device (2015-02-10),
10. 8929052 - Methods of processing semiconductor substrates, electrostatic carriers for retaining substrates for processing, and assemblies comprising electrostatic carriers having substrates electrostatically bonded thereto (2015-01-06),
11. 8896105 - Microelectronic devices and methods for manufacturing microelectronic devices (2014-11-25),
12. 8816463 - Wafer-level packaged microelectronic imagers having interconnects formed through terminals (2014-08-26),
13. 8786097 - Method of forming vias in semiconductor substrates and resulting structures (2014-07-22),
14. 8704380 - Methods for wafer-level packaging of microfeature devices and microfeature devices formed using such methods (2014-04-22),
15. 8680680 - Semiconductor devices including porous insulators (2014-03-25),

Title: Warren M Farnworth: A Pioneer in Semiconductor Imaging and Microfeature Workpieces

Introduction:

Warren M Farnworth, a renowned inventor hailing from Nampa, Idaho, has made significant contributions to the field of semiconductor imaging and microfeature workpieces. With an impressive track record of 774 patents, Farnworth has revolutionized the industry with his cutting-edge inventions. In this article, we will delve into his latest patents, career highlights, noteworthy collaborations, and summarize his remarkable achievements.

Latest Patents:

Farnworth's recent patents showcase his expertise in imaging and cutting semiconductor wafers and microelectronic device substrates. One such patent involves methods and systems for singulating microelectronic devices from a substrate, utilizing X-ray imaging and non-straight line cuts. This innovation allows for precise and efficient singulation of dies, enhancing manufacturing processes in the semiconductor industry.

Additionally, Farnworth has developed microfeature workpieces with alloyed conductive structures. This patent reveals a method for applying a volume of material to a microfeature workpiece's bond pad, thereby reducing its thickness while alloying metallic constituents. This technique enhances the performance and reliability of microfeature devices.

Career Highlights:

Farnworth's illustrious career includes working with prominent companies, including Micron Technology Incorporated. Micron, a world-renowned semiconductor company, has significantly benefited from Farnworth's expertise. His inventive contributions have played a crucial role in optimizing manufacturing processes and pushing the boundaries of semiconductor technologies.

Collaborations:

During his career, Farnworth has collaborated with esteemed individuals who have left their mark on the industry. Some of his notable coworkers include Alan G Wood and Salman Akram. These collaborations have fostered an environment conducive to innovation, resulting in groundbreaking patents and advancements.

Conclusion:

Warren M Farnworth's contributions to the fields of semiconductor imaging and microfeature workpieces have significantly impacted the industry. With an extensive patent portfolio and a reputation for excellence, he has reshaped manufacturing processes and enhanced the performance of microelectronic devices. Farnworth's collaborations have further enriched his innovative endeavors, solidifying his position as a pioneer in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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