The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 22, 2014
Filed:
Nov. 29, 2010
Charles M. Watkins, Eagle, ID (US);
Kyle K. Kirby, Boise, ID (US);
Alan G. Wood, Boise, ID (US);
Salman Akram, Boise, ID (US);
Warren M. Farnworth, Nampa, ID (US);
Charles M. Watkins, Eagle, ID (US);
Kyle K. Kirby, Boise, ID (US);
Alan G. Wood, Boise, ID (US);
Salman Akram, Boise, ID (US);
Warren M. Farnworth, Nampa, ID (US);
Micron Technology, Inc., Boise, ID (US);
Abstract
Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from an active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from a back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.