IDiyas

For the Inventor, By the Inventor

Singapore, Singapore

Wang Ling Goh

USPTO Granted Patents = 18

Average Co-Inventor Count = 4.7

ph-index = 7

Forward Citations = 205(Granted Patents)


Location History:

  • Nanyang Link, SG (2002)
  • Singapore, SG (2002 - 2014)

Company Filing History:

goldMedal17 out of 962 
 
Chartered Semiconductor Manufacturing Ltd (corporation)
 patents
silverMedal1 out of 1,016 
 
Globalfoundries Singapore Pte. Ltd.
 patents

Years Active: 2002-2014

where 'Filed Patents' based on already Granted Patents

18 patents (USPTO):
1. 8766454 - Integrated circuit with self-aligned line and via (2014-07-01),
2. 7721414 - Method of manufacturing 3-D spiral stacked inductor on semiconductor material (2010-05-25),
3. 7119010 - Integrated circuit with self-aligned line and via and manufacturing method therefor (2006-10-10),
4. 7060573 - Extended poly buffer STI scheme (2006-06-13),
5. 6998682 - Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension (2006-02-14),
6. 6905919 - Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension (2005-06-14),
7. 6849928 - Dual silicon-on-insulator device wafer die (2005-02-01),
8. 6841847 - 3-D spiral stacked inductor on semiconductor material (2005-01-11),
9. 6613652 - Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performance (2003-09-02),
10. 6613649 - Method for buffer STI scheme with a hard mask layer as an oxidation barrier (2003-09-02),
11. 6613648 - Shallow trench isolation using TEOS cap and polysilicon pullback (2003-09-02),
12. 6558994 - Dual silicon-on-insulator device wafer die (2003-05-06),
13. 6472697 - Assorted aluminum wiring design to enhance chip-level performance for deep sub-micron application (2002-10-29),
14. 6468880 - Method for fabricating complementary silicon on insulator devices using wafer bonding (2002-10-22),
15. 6403484 - Method to achieve STI planarization (2002-06-11),

Title: The Innovative Contributions of Wang Ling Goh

Introduction

Wang Ling Goh is a prominent inventor based in Singapore, known for his significant contributions to the field of integrated circuits and semiconductor technology. With a total of 18 patents to his name, Goh has made remarkable advancements that have influenced modern electronics.

Latest Patents

Among his latest patents is an innovative integrated circuit featuring a self-aligned line and via. This integrated circuit includes a base with a first dielectric layer, upon which a second dielectric layer is formed. A third dielectric layer is arranged in spaced-apart strips over the second layer. The design incorporates trench openings that facilitate the formation of self-aligned trench interconnects using conductor metals. Another notable patent is a method for manufacturing a 3-D spiral stacked inductor on semiconductor material. This method involves a substrate with multiple turns across various levels, enhancing the inductor's efficiency and performance.

Career Highlights

Wang Ling Goh has worked with leading companies in the semiconductor industry, including Chartered Semiconductor Manufacturing Ltd and Globalfoundries Singapore Pte. Ltd. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking technologies.

Collaborations

Throughout his career, Goh has collaborated with talented individuals such as Alex See and Yeow Kheng Lim. These partnerships have fostered innovation and have been instrumental in the development of his patented technologies.

Conclusion

Wang Ling Goh's contributions to the field of integrated circuits and semiconductor technology are noteworthy. His innovative patents and collaborations reflect his dedication to advancing technology in meaningful ways.

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